1. Field of the Invention
The present invention relates to drivers, and more particularly to high speed differential drivers for providing bi-directional output currents in response to differential input signals.
2. Description of Related Art
Differential drivers are used for driving cables interconnecting integrated circuits, peripheral devices, traces, and so on. The driver receives a differential input signal that includes a first voltage representing a logic state and a second voltage representing the complement of the logic state. For instance, when the logic state is a "1" the first voltage is high and the second voltage is low, and when the logic state is a "0" the first voltage is low and the second voltage is high. The driver generates an output current in response to the differential input signal. When the first voltage is high and the second voltage is low the output current flows in a first direction, and when the first voltage is low and the second voltage is high the output current flows in a second direction opposite the first direction. Typically the output current has the same magnitude in both directions.
Differential drivers are implemented with bipolar and CMOS technology. CMOS drivers are described by Kyongho Lee et al in "A CMOS Serial Link for 1 Gbaud Fully Duplexed Data Communication," 1994 Symposium on VLSI Circuits Digest of Technical Papers, pp. 125-126, and by Niantsu Wang in "Digital MOS Integrated Circuits," Prentice Hall (1989), pp. 156-157.
Unfortunately, like their bipolar counterparts, these CMOS drivers dissipate a considerable amount of power via steady state current which does not contribute to the output signal. For instance, the CMOS driver described by Wang includes two current sources coupled to the supply voltage and two switching transistors coupled to ground. The switching transistors are responsive to the differential input signal. A first output terminal is coupled to the first current source and the first switching transistor, and a second output terminal is coupled to the second current source and the second switching transistor. When the differential signal causes the first switching transistor to open and the second switching transistor to close, the current from the first current source flows from the first output terminal through a load to the second output terminal and through the second switching transistor to ground, however, the current from the second current source flows through the second switching transistor to ground and is wasted. Likewise, when the differential signal causes the first switching transistor to close and the second switching transistor to open, the current from the second current source flows from the second output terminal through the load to the first output terminal and through the first switching transistor to ground, however, the current from the first current source flows through the first switching transistor to ground and is wasted.
A driver that essentially eliminates wasted current is described by Robert J. Bosnyak et al in U.S. application Ser. No. 08/653,788 filed May 28, 1996, entitled "Fully Complimentary Differential Output Driver For High Speed Digital Communications." In one embodiment, the driver includes a first current source coupled to the supply voltage, a second current source coupled to ground, first and second switching transistors coupled to the first current sources, third and fourth transistors coupled to the second current source, a first output terminal between the first and third switching transistors, and a second output terminal between the second and fourth switching transistors. When the differential signal causes the first and third switching transistors to close and the second and fourth switching transistors to open, the current from the first current source flows through the first switching transistor to the first output terminal, from the first output terminal through a load to the second output terminal, and from the second output terminal through the third switching transistor to the second current source to ground. Likewise, when the differential signal causes the first and third switching transistors to open and the second and fourth switching transistors to close, the current from the first current source flows through the second switching transistor to the second output terminal, from the second output terminal through the load to the first output terminal, and from the first output terminal through the fourth switching transistor to the second current source to ground. In this manner, a constant current between the first and second current sources is steered in alternating directions through the load. A drawback, however, is that the power supply voltage must normally exceed the combined threshold voltages of four transistors (two current sources and two switching transistors) in order to keep these transistors in saturation.
It is often desirable to reduce the power supply voltage, for instance from 5 volts to 2-3 volts, for several reasons. First, this reduces power dissipation, which can be of great importance in portable electronics such as laptop computers and cellular telephones. Second, this increases reliability. That is, as MOS transistor dimensions are reduced, the electric field in the channel region near the drain tends to increase. If the electric field becomes strong enough, it can give rise to so-called hot-carrier effects, in which hot electrons overcome the potential energy barrier between the substrate and the gate insulator and are injected into the gate insulator. Trapped charge in the gate insulator can accumulate over time and lead to a permanent change in the threshold voltage of the device, which can cause the device to turn on and off at the wrong voltage levels.
In CMOS circuits, the power supply voltage normally exceeds the combined threshold voltages of the N-channel and P-channel devices to assure that N-channel and P-channel devices connected in series between the power supply terminals can be driven into saturation. Thus, CMOS circuits that require power supply voltages on the order of four threshold voltages are not well-suited for low voltage operation.
Accordingly, a need exists for a CMOS differential driver that reduces power dissipation yet operates at low voltages.